Prottay M. Adhikari

Prottay M. Adhikari

Lead engineer focusing on communication protocols for distributed energy resources in the DERMS center of excellence in Eaton, with a PhD from RPI, an M. Tech from IIT Bombay and a BE from IIEST Shibpur, all in Electrical Engineering.

Academic Research/Experience:

  1. Graduate Research Assistant, ALSET Lab, Rensselaer Polytechnic Institute (2017-2021)
    • FPGA based Phasor Measurement Unit implementation and verification.
    • Time-critical control application development on reconfigurable hardware based on real time PMU streams.
    • Cross platform RT-modeling for Li-ion battery based energy storage system.
    • CHIL-Evaluation of protection schemes for smart inverters for DERs.
    • Real-time HIL/CHIL implementation of renewable energy components and microgrid units.
    • CHIL test development for investigating the impact of GFOV/SPOV/LROV in inverter based DERs.
    • Experimentation with networking and protocols in a digital power system simulation lab.
  2. Graduate Research Assistant, EmSys Lab, IIT Bombay (2013-2016)
    • Implementation and testing of a C-to-FPGA pathway based on AHIR v2 tools.
    • Management and maintenance of reconfigurable computing resources.
    • Experimentation with IMAGE Simulation Accelerator for Xilinx FPGAs.
    • Low-level modeling of Modular Multilevel Converters for real-time implementation.
    • Real-time predictor development for Modular Multilevel Converters.

Industrial Experience:

  1. Specialist, DERMS Center of Excellence, Eaton (2022-present)
    • Communication protocols for real-time industrial applications (CAN bus, OCPP 1.6/2.0, PTP, NTP, IEEE 2030.5).
    • Deployment of custom microservices for DER applications on IoT edge devices.
    • Automated firmware deployment for interfacing third party devices with proprietary substation automation platform.
    • RT model implementation for DERs.
    • Secondary control deployment for real-time microgrid applications.
  2. Graduate Research Intern, AgiLE Lab, EPRI (Summer 2021)
    • PMU configuration of NY state grid on Opal-RT ePhasorSim platform.
    • Upgraded the visualization tool for NY state grid’s RTDS model.
    • Improved automation of NY-state model comparison between PSSE and RSCAD.
  3. Digital Design Engineer, ARM (2016-2017)
    • Validation of software-models for ARM v8, R class and A class processors.
    • Implementation of Interrupt Service Routines and test-automation.